The present invention relates to semiconductor devices, and more particularly to metal oxide semiconductor (MOS) devices. Even more particularly, the present invention relates to MOS devices having a low threshold and a high breakdown voltage, in which the channel region is formed by the outdiffusion of two regions.
Metal oxide semiconductor (MOS) devices are well known in the art. Generally, these devices include a source region, a drain region, a channel region, and a gate. The source and drain regions are spaced from each other by the channel region, and the gate is spaced from the channel region by an oxide layer formed on the substrate surface over the channel region. The source and drain regions are each formed by implanting material of a first conductivity type into the substrate, or a region of the substrate, which is formed of a material of a second conductivity type. For example, to make an n-channel MOS device, source and drain regions formed of n-type material are implanted into a p-type substrate or region. Alternatively, to make a p-channel MOS device, source and drain regions formed of p-type material are implanted into an n-type substrate or region. The channel region, being spatially positioned between the source and drain regions, is the same conductivity type (p-type or n-type) as the substrate or region into which the source and drain regions are implanted.
Electrical conduction between the source and drain regions does not occur appreciably until the voltage applied to the gate region with respect to the source region exceeds a particular value, known as the threshold voltage (Vth) The value of the threshold voltage for a given MOS device is directly related to the dopant concentration in the channel region. Thus, for a given MOS device, if the dopant concentration in the channel region is reduced, then the threshold voltage will accordingly be reduced, and vice-versa.
Proper MOS performance requires sufficient implantation depths for the source, drain, and channel regions. Of course, sufficient implantation depth may require increased exposure of the substrate to the impurity being implanted which, for a given channel impurity concentration, may result in increased threshold voltage. One way of overcoming increased impurity concentration is to form a region of relatively low impurity concentration, known as a high voltage, or HV region. More specifically, if the dopant impurity is p-type, then the region is termed a PHV region, and if the dopant impurity is n-type, then the region is term an NHV region.
Nonetheless, MOS devices formed using PHV or NHV channel regions still have threshold voltages too high for many low voltage applications. Therefore, there is a need in the art for an MOS device that exhibits a sufficiently low threshold voltage so that the benefits of MOS technology can be employed in low voltage applications. There is also a need for an MOS device of compact design that exhibits this sufficiently low threshold voltage.